Design-Reuse

8051 Core Executes up to 300 MIPS in Actel Axcelerator* FPGA

Multi-CPU, 8051 instruction-set-compatible parallel controller executes up to 300 MIPS in Actel Axcelerator FPGA and features concurrent real-time monitoring/debugging of all 9 CPUs via JTAG using ...
EDN

In-system programmer suits C8051F3xx family

The MPQ-C2 programmer suits in-system programming of all C8051F3xx family devices. Targeting use in medium- to high-volume manufacturing programming of in-system devices, the product can program as ...
Design-Reuse

8051 MCUs get In-System Programming Benefits Through CAST and SMH Technologies Partnership

FlashRunner™ In-System Programmer (ISP) line from SMH Technologies supports 8051s from CAST; Live 8051 programming demo running in CAST’s DAC booth Woodcliff Lake, NJ, USA and Villotta di Chions, ...
Electronic Design

Q&A: A Look Back and Ahead at Parallel Computing

We take a look back at the progress made in parallel computing with James Reinders, Parallel Programming Models Architect at Intel, who also shares his thoughts on how developers can get involved ...